Chip for AI4 resources
Hardware-aware ML
Model precision, attention mechanisms, and algorithms designed around hardware constraints.
Models and Algorithms
- BitNet / bitnet.cpp — Incorporates low-bit representations such as ternary weights into model training and provides CPU/GPU inference kernels, connecting model precision choices with execution hardware. System Paper
- FlashAttention — Designs exact attention around GPU memory hierarchies and data movement, illustrating joint optimization of algorithms, kernels, and hardware.
- Insights into DeepSeek-V3 (2025) — Examines how MLA, MoE, FP8, and network topology shape large-model training and inference requirements for compute, memory, and communication hardware.
- Native Sparse Attention (2025) — Co-designs trainable sparse attention with hardware arithmetic intensity and access patterns, combining token compression, selection, and local windows.